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ZL40539 Dual Output CD and DVD 4 Channel Laser Diode Driver
Data Sheet Features
* * * * * * * * * * * * * Pin compatible with EL6839 Dual output for CD/DVD laser LVDS control signal, internal 100 ohms Rise time 1.0 ns, Fall time 1.1 ns typical Low noise read channel with gain of 100x to 150 mA Channel 2 gain of 250x to 550 mA Channel 3 gain of 150x to 500 mA Channel 4 gain of 100x to 450 mA Combined total output current 700 mA On-chip oscillator with frequency and amplitude control by external resistors Oscillator frequency to 575 MHz, amplitude to 100 mA pk to pk Power Up/Down control > 2 kV ESD Single 5 V supply (10%)
EN4 P/N ENRB EN2 P/N
February 2005
Ordering Information ZL40539LCG Trays/Bake/Dry Pack ZL40539LCF Tape/Reel Bake/Dry Pack 0C to +70C * 32-pin QFN package
Applications
* * * * * * *
EN3 P/N
DVDRW/RAM DVDR CD-RW CD-R Write optical drives Laser Diode current switch Supports double density DVD
Enable
INR
Chip Enable/Power VCC_A
IN2
OUTA GND
IN3 OUTB IN4 VCC_B
RFA RFB RSA RSB OSCEN SELA
Figure 1 - ZL40539 Block Diagram 1
Zarlink Semiconductor Inc. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 2004-2005, Zarlink Semiconductor Inc. All Rights Reserved.
ZL40539
Data Sheet
Figure 2 - Pinout for 5 x 6 mm 32 pin QFN (top view)
Description
The ZL40539 is a high performance laser diode driver capable of driving two separate cathode grounded laser diodes (e.g., 650 nm and 780 nm laser diodes). The ZL40539 contains a 150 mA low noise read channel (ChR), and three >450 mA write channels (Ch2, Ch3 and Ch4). Each channel amplifies the positive current supplied at its reference input (INR, IN2, IN3, IN4) by a fixed factor of 100, 250, 150 and 100 respectively. The device is enabled with a High level applied to the Enable Pin. The read channel is activated by applying a 'Low' signal to the ENRB pin. Each fast write channel can be enabled by applying a positive voltage difference between the enable pins (EN2P, EN2N), (EN3P, EN3N) and (EN4P, EN4N). The output currents of the four channels are summed together and output as a composite signal at either OUTA (if SELA select is 'High') or OUTB (if SELA select is 'Low'). This provides the ability to drive two different laser diodes with just one ZL40539. Voltage control of the channel reference inputs (INR, IN2, IN3 and IN4) can be achieved by using an external resistor in series with the reference channel input to convert a given reference potential to an input current. An on-chip RF oscillator is provided for the reduction of laser mode hopping noise. The oscillator is enabled if OSCEN = 'High', and its output signal is added to the appropriate current output (OUTA, if SELA select is 'High', or OUTB, if SELA select is 'Low'). The oscillator amplitude is set by external resistors from RSA or RSB to GND. Its frequency is set by an external resistor RFA or RFB to GND. RFA and RSA are selected when SELA = `High' and RFB and RSB when SELA = 'Low'
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ZL40539
Application Notes
Read and Write Channel Operation
Data Sheet
The device is activated by applying a 'High' signal to the Enable pin. In this mode, the read channel can be enabled with a low signal on ENRB. The fast write channels can be enabled by applying a 'High' signal to the respective pair of write enable pins (EN2P, EN2N), (EN3P, EN3N), or (EN4P, EN4N). The output currents of the four channels are summed together and output as a composite signal at either OUTA (if SELA select is 'High') or OUTB (if SELA select is 'Low'). This provides the ability to drive two different laser diodes with just one ZL40539. Voltage control of the channel reference inputs (INR, IN2, IN3 and IN4) can be achieved quite easily using an external resistor Rref in series with the reference channel input to convert a given reference potential Vref to an input current, Iin:
I in =
Vref Rref + Rin
,
where Rin is the input impedance of the respective reference channel. On-chip RF Oscillator An on-chip RF oscillator is enabled if OSCEN = 'High', and its output signal is added to the appropriate current output (OUTA, if SELA select is 'High', or OUTB, if SELA select is 'Low'). The oscillator amplitude is set by an external resistor from RSA or RSB to GND. Its frequency is set by an external resistor RFA or RFB to GND. RSA and RFA are selected when SELA is `High' The oscillator signal is summed with the programmed Write and Read levels before amplification to the output. The oscillator signal has zero DC level and +I_pk to -I_pk signal swing. Consequently, if the programmed DC level from the Write and Read Channels is less than the PK level programmed for the Oscillator, the combined signal will be clipped on the negative cycle of the signal. This will increase the harmonic content of the output signal and reduce the pk to pk amplitude output. Thermal Considerations Package thermal resistance is 40C/W under the EIA/JESD51-3 compliant PCB test board condition. Users should ensure that the junction temperature does not exceed 150C. Thermal resistance from junction to case and to ambient is very much dependent on how the IC is mounted onto the board, on the PCB layout and on any heat extraction arrangements. Power consumption and system ambient operating temperature limits should be noted and careful thermal gradient calculations undertaken to ensure that the junction temperature never exceeds 150C.
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Zarlink Semiconductor Inc.
ZL40539
Electrical and Optical Pulse Response
Data Sheet
ZL40539 Model
Figure 3 - Pulse Response Model Figure 3 illustrates a simplified model of the ZL40539 output and the application. The ZL40539 consists of an ideal switched current source and an equivalent model of the ZL40539 output stage. The Electrical Model for the Laser Diode is a Voltage source Vd (V_on) in series with the On Resistance Rd all in parallel with the Junction Capacitance Cd. This simplified model approximately represents the Laser Diode Electrical load when operated beyond the Laser Threshold. To a first approximation, the Optical output is proportional to the current flow in the Resistor Rd. The Laser Diode and the ZL40539 are connected together buy interconnect tracks with the return current passing through the supply decoupling bypass capacitor between ground and output Vcc. The ZL40539 will typically switch the programmed output current in 400 ps and can be approximated to an ideal switch with a propagation delay of Iout_on (1.2 nS). The electrical pulse response parameters, Trise, Tfall, Overshoot and Undershoot are determined by the combined electrical network as illustrated in Figure 3. For example, the Rise Time and Fall time for large current steps can be slew rate limited by the combined interconnect and fixed interconnect inductance. The Fixed Inductance represents that associated with packaging and minimum interconnect distance. The Interconnect Inductance is that associated with the additional tracking between Laser Diode and the ZL40539 to accommodate application physical limitations. For example:if a pulse of 360 mA amplitude (40 mA to 400 mA) is to be switched in a time of 1 nS with the Vd = 1.6 V, then:the maximum volt drop across the interconnect inductance is approximately 3.5 V (maximum Vpin for 500 mA output) - 1.6 V (Vdiode) = 1.9 V. Consequently, L*di/dt < 1.9 V. Hence, L < 1.9/ (0.36A/1nS) = 5.3 nH. Small current step size Rise and Fall time will be determined by the Bandwidth of the combined network. This is dominated by the Interconnect Inductance and the output Capacitance. Similarly, the overshoot and undershoot will be determined by the Q of the network. This is a function of the Source Impedance from the ZL40539, the Interconnect inductance and the Load impedance of the Laser Diode. Figure 3 includes example simplified estimates of the Q and BW of the combined Laser Diode, ZL40539 and interconnect network for two different interconnect inductance values (5 nH & 7 nH) and two different Diode On resistance (3 Ohm & 7 Ohm). This simple analysis illustrates the change in BW and Q of the network depending on these parameters. This in turn effects the Rise Time and Fall time and the Overshoot and Undershoot performance achieved in the application.
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Zarlink Semiconductor Inc.
ZL40539
Data Sheet
Specified Electrical Performance with 15 mm Interconnect and Zarlink ZLE40539 Evaluation Board The specified transient pulse performance in the table are results based on the electrical measurements and simulations across full process corners using the Zarlink Evaluation Board using a 3.9 Ohm resistive load to ground. The track interconnect between ZL40539 and the 3.9 Ohm Resistor is 15 mm long and uses a 2 mm wide track on single sided FR4 board. The return path is via two 2 mm wide tracks spaced 0.25 mm either side of the track between output and the 3.9 ohm resistor. The combined forward and return path forms a co planar transmission line with a characteristic impedance of approximately 120 ohms. The tight coupled return paths carrying the return current reduce the effective series inductance (Leff) which can be approximated to:Leff = 2 * Lint * (1 - K) + 2 * Lfix * (1 - K). The ZLE40539 board has two positions for the Laser Diode at two different distances. (15 and 30 mm). The measured value of Leff is 7 nH. The estimated value of Leff = 2 * 8 (1 - 0.5) = 8 nH. The actual pulse response achieved in an application is thus dependent on the application. Application Layout Guide Lines Minimize Interconnect Inductance by: 1. Using Short Interconnect Distance 2. Use wide interconnect tracks 3. Keep the return path tightly coupled to the forward path ZL40539E Interconnect
Figure 4 - ZLE40539 Application Board Electrical Interconnect
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Zarlink Semiconductor Inc.
ZL40539
Application Diagram
Data Sheet
Figure 5 - Application Schematic Diagram
Evaluation Boards From Zarlink Semiconductor
Zarlink Semiconductor provide an LDD evaluation board. This is primarily for those interested in performing their own assessment of the operation of the LDD. Figure 5 shows a recommended application configuration. The inputs are connected via side launch SMA connectors. Please order as ZLE40539.
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Pin List
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Pin Name VCC_IN GND INR IN2 IN3 IN4 RFA RFB GND ENRB EN2P EN2N EN3P EN3N EN4P EN4N OSCEN GND SELA ENABLE RSA RSB GND OUTB OUTB VCC_B VCC_B GND GND OUTA OUTA VCC_A Type Supply Supply Analog Analog Analog Analog Analog Analog Supply Digital, CMOS Digital, LVDS Digital, LVDS Digital, LVDS Digital, LVDS Digital, LVDS Digital, LVDS Digital, CMOS Supply Digital, CMOS Digital, CMOS Analog Analog Supply Analog Analog Supply Supply Supply Supply Analog Analog Supply Input Vcc Ground Current input, Rin = 500 to GND Current input, Rin = 500 to GND Current input, Rin = 500 to GND Current input, Rin = 500 to GND Function
Data Sheet
Resistor to GND sets oscillator frequency when SELA='High' Resistor to GND sets oscillator frequency when SELA='Low' Ground Enable Read Bar for Read Channel Positive channel 2 enable input (EN2P>EN2N channel 2 enabled) Negative channel 2 enable input Positive channel 3 enable input (EN3P>EN3N channel 3 enabled) Negative channel 3 enable input Positive channel 4 enable input (EN4P>EN4N channel 4 enabled) Negative channel 4 enable input Oscillator enable control input (OSCEN = Hi the oscillator is ON) Ground 'Output select' input; 'High' selects OUTA, 'Low' selects OUTB Chip enable input, Enable = high the chip is active External resistor to GND sets oscillator amplitude when SELA ='High' External resistor to GND sets oscillator amplitude when SELA ='Low' Ground Output current source B (sum of all channels) Output current source B (sum of all channels) Output B Vcc Output B Vcc Ground Ground Output current source A Output current source A Output A Vcc
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Zarlink Semiconductor Inc.
ZL40539
Absolute Maximum Ratings Value Characteristic Min. Supply voltage (VCC, VCC_IN) Input voltage (INR, IN2, IN3, IN4) Input voltage (ENABLE, EN2P, EN2N, EN3P, EN3N, EN4P, EN4N, OSCEN, SELA) Output voltage (OUTA, OUTB) Output current (OUTA, OUTB) Junction temperature -0.5 -0.5 -0.5 Typ. Max. 6.0 VCC_IN + 0.5 VCC_IN + 0.5 V V V Units
Data Sheet
Comments
-0.5
VCC 700 150
V mA pk C
CAUTION: Stresses outside these ranges may cause permanent damage to the device.
Operating Range Value Characteristic Min. Supply voltage (VCC, VCC_IN) INR input voltage range IN2 input voltage range IN3 input voltage range IN4 input voltage range INR input current range IN2 input current range IN3 input current range IN4 input current range Output voltage (OUTA, OUTB) Oscillator frequency range Oscillator amplitude range RFA and RFB RSA and RSB 4.5 0 0 0 0 0 0 0 0 -0.3 100 40 1 1 Typ. Max. 5.5 1.0 1.0 1.7 2.3 2.0 2.8 4.7 6.3 VCCA, B-0.9 600 100 V V V V V mA mA mA mA V MHz mA k k External resistors to GND External resistors to GND Units Comments
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Zarlink Semiconductor Inc.
ZL40539
Value Characteristic Min. Operating ambient temperature range Operating temperature range, junction 0 0 Typ. Max. 70 150 C C Units
Data Sheet
Comments
Package Thermal Resistance Junction to Package Type Case RthJC ambient RthJA 40 Units Comments
32 pin QFN
K/W
Exposed paddle soldered to multi-layer PCB
Electrical Characteristics - Supply Current and Digital Inputs - Vcc = 5 V, Tamb = 25C, INR = IN4 = 400A, IN2 = 160A, IN3 = 267 A, Enable = High, ChR, Ch2, Ch3, Ch4 disabled, OSCEN = Low, unless otherwise specified. Value Characteristic Min. Supply Current (into VCCpin) Supply current, power down, IccPD Supply current, read mode, oscillator disabled, IccR0 Supply current, read mode, oscillator enabled, IccR1 80 69 70 220 84 85 A mA mA ENABLE = Low INR = 400 A, ChR enabled OSCEN = High, ChR enabled RF = 6.8 kOhm, RS = 8.2 kOhm, Ch2, Ch3, Ch4 enabled ChR, Ch2, Ch3, Ch4 enabled INR = IN2 = IN3 = IN4 = 0uA B B A A Typ. Max. Unit Comments Type
Supply current, write mode, IccW Supply current, input off
150 20
198 25
mA mA
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Zarlink Semiconductor Inc.
ZL40539
Value Characteristic Min. SELA & OSCEN Digital Inputs Logic low voltage Logic high voltage Threshold level Logic low input current Logic high input current -50 50 2.0 1.68 0.8 V V V A A TTL compatible level TTL compatible level Temperature stabilised Vin = 0 V Vin = 3.3 V Typ. Max. Unit Comments
Data Sheet
Type
A A B B B
ENRB & Enable digital inputs Logic low voltage Logic high voltage Logic low input current Logic high input current Logic high input current 2.8 -50 70 700 300 800 0.5 V V A A A CMOS compatible level CMOS compatible level Vin = 0 V Vin = 3.3 V Vin = 5.0 V, 2 k external resistor in series with input A A B B
LVDS Digital Inputs Input voltage range Differential input voltage 0 100 2.4 600 V mV V(EN2P-EN2N), V(EN3P-EN3N), V(EN4P-EN4N), All LVDS Compatible B A
Differential Input impedance Common mode input impedance
Notes:
87
110 10
133
V k internal resistor to Vcc
B B
A = 100% Tested B = Guaranteed by Characterisation and Design C = Guaranteed by Simulation
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Zarlink Semiconductor Inc.
ZL40539
Low, unless otherwise specified.
Data Sheet
Electrical Characteristics - Outputs A and B - Vcc = 5 V, Tamb = 25C, Enable = High, ChR, Ch2, Ch3, Ch4 disabled, OSCEN = Value Characteristic Min. Read channel output current Channel 2 output current Channel 3 output current Channel 4 output current Total output current 150 550 500 450 700 Typ. 180 650 600 570 900 Max. mA mA mA mA mA ChR enabled, Vout 3.0 V Ch2 enabled, Vout 3.0 V Ch3 enabled, Vout 3.0 V Ch4 enabled, Vout 3.0 V ChR, 2, 3, 4 enabled, Vout 3.0 V B A A A B Unit Comments Type
Read Output current, zero input Ch2 Output Current, zero input Ch3 Output Current, zero input Ch4 Output Current, zero input
1.3 1.5 0 0
2.5 10 2 2
mA mA
INR = 0 A, ChR enabled IN2 = 0 A, Ch2 enabled IN3 = 0 A, Ch3 enabled IN4 = 0 A, Ch4 enabled
A
Input impedance (INR, IN2, IN3, IN4)
410
500
590
W
Rin to GND
B
Iout supply sensitivity, any channel Iout temperature sensitivity, any channel Iout current output noise
+3.0
+4.2 300 3
+6.0
%/V ppm/ C nA/ Hz
Iout = 80 mA, Rdiode = 3.9 Vdiode = 1.6 V Iout = 160 mA, Iin temp coefficient = 0 ppm/C Iout = 50 mA InR=500 uA
B C B
Current gain, ChR, best fit * Current gain, Ch2, best fit ** Current gain, Ch3, best fit ** Current gain, Ch4, best fit ** Output current offset, ChR, best fit
85 205 120 85 -1
100 250 150 100 +3
115 275 180 115 8
mA/ mA mA/ mA mA/ mA mA/ mA mA
Iout = 20 mA to 60 mA * ChR enabled Iout = 40 mA to 120 mA ** Ch2 enabled Iout = 40 mA to 120 mA ** Ch3 enabled Iout = 40 mA to 120 mA ** Ch4 enabled Iout = 20 mA to 60 mA * ChR enabled
A A A A A
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Zarlink Semiconductor Inc.
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Value Characteristic Min. Output current offset, Ch2, best fit Output current offset, Ch3, best fit Output current offset, Ch4, best fit Output current linearity (any channel) * -2.5 -2 -2 -0.5 Typ. +5 +3.2 +2.5 +0.8 Max. 12 8 7 1.5 mA mA mA % Iout = 40 mA to 120 mA ** Ch2 enabled Iout = 40 mA to 120 mA ** Ch3 enabled Iout = 40 mA to 120 mA ** Ch4 enabled Iout = 40 mA to 120 mA ** Unit Comments
Data Sheet
Type A A A A
Notes: A = 100% Tested, B = Guaranteed by Characterisation and Design, C= Guaranteed by Design
otherwise specified.
Electrical Characteristics - Timing - Vcc = 5 V, Tamb = 25C, Enable = High, Ch2, Ch3, Ch4 disabled, OSCEN = Low, unless Value Min. Current Output OutA & OutB Channel rise time, (10% to 90%), tr2 Channel fall time, (10% to 90%), tf2 Output current overshoot (any write channel) Output current undershoot (any write channel) 1.1 1.2 5 5 2.0 2.0 ns ns % % 40 mA RD + 40 mA WR, Ch2, 3 or 4 pulsed* 40 mA RD + 40 mA WR, Ch2, 3 or 4 pulsed* 40 to 375 mA Ch2 3, 4 pulsed* 40 to 375 mA Ch2 3, 4 pulsed* B B B B Typ. Max.
Characteristic
Unit
Comments
Type
Channel to Channel Enable Skew Tr Channel to Channel Enable Skew Tf Iout ON propagation delay, tonCh Iout OFF propagation delay, toffCh
50 50 2.0 2.0
ps ps ns ns 50% En High-Low to 50% Iout, any write channel 50% En Low-High to 50% Iout, any write channel
B B B B
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Characteristic Min. Read amplifier -3 dB bandwidth Ch2 Wr amplifier -3 dB bandwidth Ch3 Wr amplifier -3 dB bandwidth Ch4 Wr amplifier -3 dB bandwidth 41 15 22 28 Value Typ. 55 21 30 40 Max. 69 27 39 52 MHz MHz MHz INR=400 A, ChR enabled IN2=400 uA, Ch2 enabled IN3=400 uA, Ch3 enabled IN4=400 uA, Ch4 enabled Unit Comments
Data Sheet
Type C
Power_Up & SelA Power_Up time, ton Power_Up time, toff Output A select delay Output A deselect delay 1.5 20 5 5 3.5 33 8 8 s ns ns ns 50% PowerUp-High to 50% Iout 50% PowerUp-Low to 50% Iout 50% CD/DVD select Low-High to 50% IOUTA 50% CD/DVD select High-Low to 50% IOUTA C C C C
Notes:A = 100% Tested B = Guaranteed by Characterisation and Design C= Guaranteed by Design * (EN2P, EN2N), (EN3P, EN3N), (EN4P, EN4N) input pulse rise and fall time = 0.4 ns. Parameter is measured Electrical Pulse Response using 3.9 Ohm load to gnd and Zarlink Application Board. Pulse response performance parameters Trise, Tfall, Overshoot and Undershoot can be limited by interconnect inductance. Optical response is influenced by Laser Diode response. See Application Notes.
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Zarlink Semiconductor Inc.
ZL40539
Data Sheet
Electrical Characteristics - Oscillator - Vcc = 5 V, Tamb = 25C, INR = 400 uA, IN2 = IN3 = IN4 = 160 A, PWR_UP = High, Ch2, Ch3, Ch4 disabled, OSCEN = Low, unless otherwise specified. Value Characteristic Min. Oscillator Frequency adjust Low Frequency adjust High Frequency tolerance Frequency temperature coefficient Amplitude adjust Low (RS=11 K) Amplitude adjust High (RS=1 K) Third Harmonic 575 335 381 -100 26 83 -30 427 250 MHz MHz MHz ppm/C mA pk to pk mA pk to pk dBC RF = 16 k, OSCEN = High RF = 2 k OSCEN = High RF = 7.5 k, OSCEN = High RF = 7.5 k, OSCEN = High RS = 11 k, OSCEN = High RF=9 K (350 MHz) InR=1 mA RS = 1 k, OSCEN = High RF=9 K (330 MHz) INR=1 mA RS = 10 k to 2 k, OSCEN = High RF=9 K (330 MHz) INR=400 uA RS = 10 k to 2 k, OSCEN = High RF=9 K (330 MHz) INR=400 uA Fosc= 250 MHz to 450 MHz, OSCEN = High, RSA/B 1% f = 400 MHz, RS = 7.5 k, OSCEN = High RS = 7.5 k, RF = 9 k to 4 k RF = 5.6 k, OSCEN = High 50% OSCEN High-Low to 50% Iout 50% OSCEN Low-High to 50% Iout B B A C B B C Typ. Max. Unit Comments Type
Second Harmonic
-20
dBC
C
Amplitude tolerance Amplitude RS=7.5 K Amplitude flatness Amplitude temperature coefficient Oscillator enable time, tonOsc Oscillator disable time, toffOsc
-20
0 35 9 800
20
% mA pk to pk dB ppm/ C
C C B C B B
2 3
ns ns
Notes: A = 100% Tested B = Guaranteed by Characterisation and Design C= Guaranteed by Design * (EN2P, EN2N), (EN3P, EN3N), (EN4P, EN4N) pulse rise and fall time = 0.4 ns.
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Zarlink Semiconductor Inc.
ZL40539
Characteristic Curves
Data Sheet
Figure 6 - Iout vs Iin for Read Channel
Figure 7 - Iout vs Iin Channel 2
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Zarlink Semiconductor Inc.
ZL40539
Data Sheet
Figure 8 - Iout vs Iin Channel 3
Figure 9 - Iout vs Iin Channel 4
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Zarlink Semiconductor Inc.
ZL40539
Data Sheet
Figure 10 - Oscillator Frequency vs RF
Figure 11 - Oscillator Current Amplitude vs RS
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Zarlink Semiconductor Inc.
ZL40539
Data Sheet
Figure 12 - Oscillator Amplitude vs Frequency Vcc = 5 V, Temp = 25C
Figure 13 - Pulse Response for 200 mA Write Current
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Zarlink Semiconductor Inc.
ZL40539
Data Sheet
Figure 14 - Pulse Response for 200 mA Write Current
I/O diagrams
VCC
300k
Figure 15 - CMOS/LVTTL Input (Enable, OSCEN)
Figure 16 - Oscillator Resistors (RF, RS)
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Zarlink Semiconductor Inc.
ZL40539
Data Sheet
VCC
400R
Figure 17 - Read Current Input (INR)
Figure 18 - Output (OUTA, OUTB)
Figure 19 - Write Current Input (IN2, IN3, IN4)
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Zarlink Semiconductor Inc.
ZL40539
Data Sheet
Figure 20 - LVDS Input (EN2, /EN2), (EN3, /EN3), (EN4, /EN4)
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Zarlink Semiconductor Inc.
ZL40539
OUTA and OUTB Control
Enable 0 1 1 1 1 1 1 1 1 1 1 1 SELA X X 1 1 1 1 1 0 0 0 0 0 ENRB X 1 0 0 0 0 0 0 0 0 0 0 EN2PEN2N X 0 0 1 0 0 1 0 1 0 0 1 EN3PEN3N X 0 0 0 1 0 1 0 0 1 0 1 EN4PEN4N X 0 0 0 0 1 1 0 0 0 1 1 OUTA OFF OFF 100xINR 100xINR +250xIN2 100xINR +150xIN3 100xINR +100xIN4 100xINR+250xIN2+1 50xIN3+100xIN4 OFF OFF OFF OFF OFF
Data Sheet
OUTB OFF OFF OFF OFF OFF OFF OFF 100xINR 100xINR +250xIN2 100xINR +150xIN3 100xINR +100xIN4 100xINR+250xIN2+ 150xIN3+100xIN4
Table 1 - Output Function for Set Logic Inputs
Note: 1 = logic high, 0 = logic low and X = "don't care"
Oscillator Control
Enable 0 1 1 1 SELA X X 1 0 ENRB X X 0 0 OSCEN X 0 1 1 OUTA OFF OFF Frequency A, Amplitude A OFF OUTB OFF OFF OFF Frequency B, Amplitude B
Table 2 - Output Function for Set Logic Inputs
Note: 1 = logic high, 0 = logic low and X = "don't care"
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ZL40539
Timing Diagrams
Data Sheet
EN(n)N
EN(n)P
Iout=IN(n)*gain
Iout=0
t_on_ch
t_off_ch
Figure 21 - Timing of Read or Write Channels
ten ENABLE ENRB NE2N NE2P NE3N NE3P NE4N NE4P ton IOUT ton tr tr ton ton tr tr tf tf tf toff toff toff
tdis
toff
tf
Figure 22 - Timing of Output with Enable, Read and Write Levels
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Zarlink Semiconductor Inc.
ZL40539
Example Waveforms
Write Waveform
Data Sheet
The Write output waveform may be produced as shown in Figure 23. The Erase level is set by switching off both the Bias level and the Write level. The Write switching waveform is produced by switching off the Erase level and Switching on the Bias level and then modulating that with the Write level. The peak of the Write waveform is the sum of the Bias and the Write levels.
W RITE
INPUT
ERASE
BIAS
W RITE W RITE OUTPUT ERASE BIAS
ERASE
Figure 23 - Write Waveform Example
Note 1: Note 2: Only the Write signal changes to modulate the output during the Write pulse. Each of the Write Channels can provide typically 570 mA. It is not necessary to add together the output of more than one Write Channel to achieve 570 mA.
Oscillator Waveform The Oscillator may be enabled independently and is summed with the selected level.
ENRB
ENOSC
50%
READ OFF
Osc_tON Osc_tOFF
Figure 24 - Example of the Oscillator Waveform Superimposed on the Read Waveform
Note: The amplitude of the Oscillator must be less than the programmed DC output level to avoid clipping and subsequent increase in harmonic distortion.
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Zarlink Semiconductor Inc.
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www.zarlink.com
Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively "Zarlink") is believed to be reliable. However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use. Neither the supply of such information or purchase of product or service conveys any license, either express or implied, under patents or other intellectual property rights owned by Zarlink or licensed from third parties by Zarlink, whatsoever. Purchasers of products are also hereby notified that the use of product in certain ways or in combination with Zarlink, or non-Zarlink furnished goods or services may infringe patents or other intellectual property rights owned by Zarlink. This publication is issued to provide information only and (unless agreed by Zarlink in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. The products, their specifications, services and other information appearing in this publication are subject to change by Zarlink without notice. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user's responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. Manufacturing does not necessarily include testing of all functions or parameters. These products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided subject to Zarlink's conditions of sale which are available on request.
Purchase of Zarlink's I2C components conveys a licence under the Philips I2C Patent rights to use these components in and I2C System, provided that the system conforms to the I2C Standard Specification as defined by Philips. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright Zarlink Semiconductor Inc. All Rights Reserved.
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